Definition
Wire bonding connects die pads to a package with formed wire loops, while flip chip joins a face-down die through an array of bumps or pillars to a substrate, interposer, or redistribution layer.
Process position
Inputs
- Qualified die and package surface
- Die-attach material
- Wire or bump interconnect
- Bonding recipe and alignment data
Outputs
- Mechanically attached and electrically connected die
- Bond quality and traceability records
How it works
- 01Prepare die and receiving surface
- 02Attach or align die
- 03Form wire bonds or place flip-chip joints
- 04Reflow or thermocompression bond where required
- 05Clean and inspect
- 06Apply underfill when required
Process control profile
Materials, equipment, defects, and metrology
These records connect a physical input and tool module to its failure mechanism, detection method, and release decision. They complement the broader inventories in the control surface.
Material focus
Bond wire, bump or pillar, pad finish, flux, and die-attach material
Create permanent electrical and mechanical joints between die and package.
Control: Control metallurgy, dimensions, oxidation, contamination, moisture, coplanarity, and storage history.
Failure link: Interface contamination or metallurgy drift changes wetting, intermetallic formation, and fatigue life.
Equipment module
Die bonder, wire bonder, flip-chip bonder, reflow, cleaner, and inspection tools
Aligns and attaches die, forms wire loops or area-array joints, and stabilizes the interface.
Control variables: Alignment, force, ultrasonic energy, temperature, time, loop shape, reflow, and atmosphere.
Integration risk: Bond recipe and pad/bump metallurgy must be qualified together, including downstream mold or underfill stress.
Defect mechanism
Nonstick, lifted wire, bump open/bridge, or pad damage
Surface condition, alignment, energy, force, wetting, geometry, or warpage prevents a sound joint.
Detection: Optical and X-ray inspection, pull/shear, continuity, acoustic imaging, and cross-section.
Downstream effect: Produces immediate opens/shorts or latent fatigue, corrosion, and interface failure.
Metrology gate
Joint formation and strength metrology
Measures geometry, continuity, voids, mechanical strength, and interfacial structure.
Release decision: Releases the interconnected assembly to encapsulation and higher-value test.
Limitation: Sample pull/shear is destructive and may not predict every long-term fatigue mode.
Interconnect architecture sets the routing and thermal geometry
Wire bonds connect perimeter or accessible pads through free-standing loops. Flip chip uses an area array beneath the die, enabling shorter and denser connections but placing tighter demands on bump uniformity, alignment, warpage, cleaning, and underfill.
Production die-stacking flows can combine die attach, wire bonding, and flip-chip assembly within the same package family.
Bond formation is an interface process
Electrical continuity alone does not establish long-term quality. The bond must have suitable intermetallic structure, mechanical strength, cleanliness, and stress behavior through assembly and use conditions.
Sources
Citations support the tagged claims above. Access dates record when Maha Strategies last checked the public source.
- [1]3D Stacked Die Packaging · Amkor Technology · accessed 2026-08-13
- [2]A New RDL-First PoP Fan-Out Wafer-Level Package Process · Amkor Technology · 2020 · accessed 2026-08-13
Public capability landscape
Supplier profiles
Named companies are research leads based on public evidence. Inclusion does not establish customer qualification, process-of-record status, available capacity, or supplier ranking.
Outsourced semiconductor assembly and test
Amkor Technology
Provides package design, wafer preparation, die attach, wire bond, flip chip, stacked-die assembly, and semiconductor test services.
Evidence profile →
Outsourced semiconductor assembly and test
ASE Technology
Provides semiconductor assembly, packaging, wafer probe, final test, and related engineering services.
Evidence profile →